Arithmetic and Binary Logic Instructions

                     █▌Integer Math▐█
ADD  dest,src        add two operands, placing result in dest
                      dest←(src + dest)
ADC  dest,src        add two operands, using carry from previous ADD
                      dest←(src + dest + CF)
INC  dest            add 1 to dest (reg or r/m)
                      dest←(dest+1)

SUB  dest,src        subtract src from dest, leaving result in dest
                      dest←(dest - src)
SBB  dest,src        subtract using borrow (carry flag) from previous SUB
                      dest←((dest - src) - CF)
DEC  dest            subtract 1 from dest (reg or r/m)
                      dest←(dest - 1)

CMP  dest,src        compare (non-destructive subtract)
                      flags are set to indicate carry, overflow, etc.

NEG  dest            change sign of an operand
                      dest←(0 - dest);

AAA                  adjust after ASCII addition
                      AL←(AL corrected for ASCII addition)
AAS                  adjust for ASCII subtraction
                      AL←(AL corrected for ASCII subtraction)
AAM                  adjust after ASCII multiply
                      AH:AL←(AH:AL corrected for ASCII multiplication)
AAD                  adjust before ASCII division
                      AH:AL←(AH:AL prepared for division of ASCII codes)

DAA                  adjust after BCD addition
                      AL←(AL corrected for BCD addition)
DAS                  adjust for BCD subtraction
                      AL←(AL corrected for BCD subtraction)

MUL src              multiply AL(AX) by unsigned value src (reg/mem)
                      AX←(AL * src8)
                      DX:AX←(AX * src16)
IMUL src             multiply AL(AX) by signed integer src (reg/mem)
                      AX←(AL * immed8)
                      DX:AX←(AX * immed16)
IMUL reg16,r/m,im16  multiply reg/mem by 16-bit immediate signed value 286+
                      reg16←(r/m8 * im16)
                      reg16←(r/m16 * im16)

DIV  src             divide accumulator by unsigned value src (reg/mem)
                     Division by 0 or result too large causes INT 0.
                      AL←(AX ÷ src8); AH←(AX MOD src8)
                      AX←(DX:AX ÷ src16); DX←(DX:AX MOD src16)
IDIV src             divide accumulator by unsigned value src (reg/mem)

CBW                  convert byte to word (sign-extend AL into AH)
                      AH←(filled with bit-7 of AL)
CWD                  convert word to dword (sign-extend AX into DX)
                      DX←(filled with bit-15 of AX)

                     █▌Bitwise Logic▐█
AND dest,src         logical AND (mask; reset dest bits which are 0 in src)
                      dest←(dest & src)
TEST dest,src        non-destructive AND (bit test; JZ jumps if no match)
                      flags←(set as for dest & src)

OR   dest,src        inclusive OR (set dest bits which are 1s in src)
                      dest←(dest | src)

XOR  dest,src        exclusive OR (toggle dest bits which are 1s in src)
                      dest←(dest ^ src)

NOT  dest            form 1's complement (toggle every bit in dest)
                      dest←(~dest)

                     █▌Shifts and Rotates▐█
RCL  dest            Rotate dest left through Carry by 1 bit position
     dest,CL          ...by CL bit positions
     dest,cnt         ...by immediate count bit positions (mod 32)     386+

RCR  dest            Rotate dest right through Carry by 1 bit position
     dest,CL          ...by CL bit positions
     dest,cnt         ...by immediate count bit positions (mod 32)     386+

ROL  dest            Rotate dest left by 1 bit position
     dest,CL          ...by CL bit positions
     dest,cnt         ...by immediate count bit positions (mod 32)     386+

ROR  dest            Rotate dest right by 1 bit position
     dest,CL          ...by CL bit positions
     dest,cnt         ...by immediate count bit positions (mod 32)     386+

SHL/
 SAL dest            Shift left by 1 bit position (multiply by 2)
     dest,CL          ...by CL bit positions
     dest,cnt         ...by immediate count bit positions (mod 32)     386+

SHR  dest            Shift right by 1 position (divide by 2)
     dest,CL          ...by CL bit positions
     dest,cnt         ...by immediate count bit positions (mod 32)     386+

SAR  dest            Shift arithmetic right (retain high bit) by 1 position
     dest,CL          ...by CL bit positions
     dest,cnt         ...by immediate count bit positions (mod 32)     386+
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                                                            Instruction Set